# Practice Quiz in DC Biasing – FETs Part 5

Online Practice Quiz in DC Biasing – FETs part 5 from the book Electronic Devices and Circuit Theory 10th Edition by Robert L. Boylestad.

This is the Online Practice Quiz in DC Biasing – FETs Part 5 from the book, Electronic Devices and Circuit Theory 10th Edition by Robert L. Boylestad. If you are looking for a reviewer in Electronics Engineering this will definitely help. I can assure you that this will be a great help in reviewing the book in preparation for your Board Exam. Make sure to familiarize each and every questions to increase the chance of passing the ECE Board Exam.

### Continue Part V of the Online Practice Quiz

#### Quiz in DC Biasing – FETs

Question 41. For the field-effect transistor, the relationship between the input and the output quantities is _____.

A. linear

B. nonlinear

C. 3rd degree

D. None of these

Question 42. In an enhancement-type MOSFET, the drain current is zero for levels of VGS less than the _____ level.

A. VGS(Th)

B. VGS(off)

C. VP

D. VDD

Question 43. The coupling capacitors are _____ for the dc analysis and _____________ for the ac analysis.

A. open-circuit, low impedance

B. short-circuit, low impedance

C. open-circuit, high impedance

D. None of these

Question 44. . In a depletion-type MOSFET, the transfer characteristic rises _____ as VGS becomes more positive.

A. less rapidly

B. more rapidly

C. the same

D. None of these

Question 45. The input controlling variable for an FET transistor is a _____ level.

A. resistor

B. current

C. voltage

D. All of these

Question 46. The ratio of current ID to IDSS is equal to _____ for a fixed-bias configuration.

A. 0

B. 0.25

C. 0.5

D. 1

Question 47. For _____, Shockley's equation is applied to relate the input and the output quantities.

A. JFETs

B. depletion-type MOSFETs

C. enhancement-type MOSFETs

D. JFETs and depletion-type MOSFETs

Question 48. In _____ configuration(s) a depletion-type MOSFET can operate in enhancement mode.

A. self-bias

B. fixed-bias with no VGG

C. voltage-divider

D. None of these

Question 49. _____ levels of RS result in _____ quiescent values of ID and _____ negative values of VGS.

A. Increased, lower, less

B. Increased, higher, less

C. Increased, higher, more

D. Increased, less, lower

Question 50. In a universal JFET bias curve, the vertical scale labeled M is used for finding the solution to the _____ configuration.

A. fixed-bias

B. self-bias

C. voltage-divider

D. None of these

### More Practice Quiz in DC Biasing – FETs

Practice Quiz Part 1

Practice Quiz Part 2

Practice Quiz Part 3

Practice Quiz Part 4

Practice Quiz Part 5

Practice Quiz Part 6

### See: Complete List of Practice Quizzes

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